| 摘要 |
PROBLEM TO BE SOLVED: To reduce an off current in a standby mode.SOLUTION: A semiconductor integrated circuit includes: a CMOS logic circuit having a P channel transistor disposed between a first power line fed with a first voltage and a predetermined node, and an N channel transistor disposed between the predetermined node and a second power line fed with a second voltage lower than the first voltage; an off current measurement circuit for comparing a first off current through the P channel transistor turned off and a second off current through the N channel transistor turned off, and outputting a comparison result signal; and a control circuit for, when entering to a standby mode, according to the latest comparison result signal, turning on the P channel transistor and turning off the N channel transistor if the first off current is greater than the second off current, or turning off the P channel transistor and turning on the N channel transistor if the second off current is greater than the first off current. |
