| 摘要 |
PROBLEM TO BE SOLVED: To provide an SDRAM controller configured to further improve utilization efficiency of an SDRAM.SOLUTION: An SDRAM controller includes: a write unit which temporarily stores individual data received from a plurality of bus masters in a buffer using a burst length, and burst-writes the data in the full buffer to an SDRAM so that a previous burst-write region is continuous with an address; an address conversion unit which stores an address of the individual burst-written data on the SDRAM in association with each of address of data received from the bus masters; and a refresh unit which dummy-reads the region of the SDRAM burst-written by the write unit in a timing when a request for refreshing the SDRAM is issued. |
