发明名称 Technique for Task Sequence Execution
摘要 A technique for executing a task sequence on a computing system comprising a multiple task processor having an on-chip memory and further comprising an external memory connected to the multiple task processor is provided. A method implementation of the technique comprises transferring load module data from the external memory into the on-chip memory in order to generate a load module sequence within the on-chip memory, wherein the generation of a load module of the load module sequence comprises the following processes: determining which parts of the load module are currently stored within the on-chip memory, and transferring only load module data from the external memory into the on-chip memory for parts of the load module which are currently not stored within the on-chip memory, wherein each load module of the load module sequence is generated within an individual address range of the on-chip memory which is chosen in dependence on the load module sequence. The method implementation further comprises executing the task sequence by running the load module sequence.
申请公布号 US2014137126(A1) 申请公布日期 2014.05.15
申请号 US201214128115 申请日期 2012.06.26
申请人 VARSHNEY DEEPAK;TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) 发明人 VARSHNEY DEEPAK
分类号 G06F9/48 主分类号 G06F9/48
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