| 摘要 |
A method for booting NAND flash with programmable latch device is provided to perform a booting with a NAND flash memory by converting the NAND flash memory into a read mode. A programmable logic device(120) is positioned between a CPU(100) and a NAND flash memory(140). An input terminal is applied in an AND arrangement, performs a desired AND function operation, and generates a product term. The PLD(Programmable Logic Device) is a chip programmed in order to be used as a control unit for sending command of 6 cycles. 7 data signal lines is positioned in the CPU and the PLD. A CPU CS(Chip Select) is used for a CPU DATA[0:7] and a chip selection. A CPU WE(Write enable) manages clocking data, an address, and a command. A CPU OE(Output Enable) controls output. A CPU ALE latches the address. A CPU CLE latches the command. An I/O bus of a CPU NAND CTRL controls the NAND flash memory. |
