发明名称 Reducing Signal Skew in Memory and Other Devices
摘要 Interconnections between signal lines help to reduce signal skew between signals carried on the signal lines. The interconnections may be resistive interconnections, and the signal lines may be clock lines. In a memory controller, for example, resistive traces may connect adjacent clock lines. The resistive traces reduce the clock signal skew between the adjacent clock lines, and throughout the memory controller as a whole.
申请公布号 US2014133260(A1) 申请公布日期 2014.05.15
申请号 US201213676482 申请日期 2012.11.14
申请人 BROADCOM CORPORATION 发明人 SWAMINATHAN GANESH
分类号 G11C8/18;H03K17/00 主分类号 G11C8/18
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