摘要 |
An integrated circuit comprising: a first core circuit configured to operate at a first clock rate for carrying out a first range of tasks; and a second core circuit configured to operate in a first mode and a second mode, the second core circuit being configured to operate at a second clock rate for carrying out a second range of tasks in the second mode and being configured to operate in the second mode when the first core circuit carries out the first range of tasks, the second clock rate being greater than the first clock rate. |