发明名称 |
LOAD/MIGRATION AND DUPLICATION INSTRUCTION RELATIVE TO PROCESSOR |
摘要 |
PROBLEM TO BE SOLVED: To provide a method for loading/migrating a part of bits of a source in a processor to a destination register.SOLUTION: One and a plurality of migration/duplication instructions order a processor to store a plurality of bits from a non-continuous position group of a single source operand in a non-continuous destination position group of a destination register and to duplicate a bit from each of the non-continuous position group of the single source operand to another destination position group in the destination register. The non-continuous position group of the single source operand to which duplication is performed is fixed relative to the single migration/duplication instruction not explicitly defined by the single migration/duplication instruction. |
申请公布号 |
JP2014089730(A) |
申请公布日期 |
2014.05.15 |
申请号 |
JP20130257903 |
申请日期 |
2013.12.13 |
申请人 |
INTEL CORP |
发明人 |
ROUSSEL PATRICE |
分类号 |
G06F1/00;G06F9/315;G06F9/312;G06F9/38 |
主分类号 |
G06F1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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