| 摘要 |
This semiconductor device has a semiconductor chip, a dielectric substrate, and bonding wires (113, 112). The dielectric substrate is provided with wiring patterns (110, 109) on the front surface, and a grounding metal layer on the rear surface, and the semiconductor chip is provided with an active element, and a drain pad connected to an output end of the active element. The wiring pattern (110) is formed at a position closer to the drain pad than the wiring pattern (109), the wiring pattern (110) and the grounding metal layer form a first capacitive element, and the wiring pattern (109) and the grounding metal layer form a second capacitive element. The drain pad is connected to the wiring pattern (110) via the bonding wire (113), and is connected to the wiring pattern (109) via the bonding wire (112), and a high-pass matching circuit is formed by being configured from the bonding wire (113) and the first capacitive element. |
