Multi-step ADC with sub-ADC calibration

摘要

Various embodiments of the invention allow for error calibration in analog-to-digital converters (ADCs) having multiple cascaded ADC stages. The ADC stages exchange information that is utilized in the calibration process. Various embodiments allow for calibration of one stage by utilizing a feedback signal from at least one subsequent stage. Certain embodiments of the invention increase the speed of the calibration process by utilizing coarse and fine sub-ADCs.