发明名称 Resistance element and inverting buffer circuit
摘要 It is possible to suppress a change in a resistance value caused by a potential of a semiconductor substrate 10 near a resistance element layer 13, a power line passing on or above the resistance element layer, or a signal line, without generating useless current or a distortion in a signal. A first conductive layer 15 biased by the potential of a first electrode 11 and a second conductive layer 16 biased by the potential of a second electrode 12 cover below the resistance element layer equally. A change in the resistance value caused by a potential difference between the resistance element layer and a neighboring semiconductor substrate 14 is cancelled by the first conductive layer and the second conductive layer covering at least one of above and below the resistance element layer with both ends biased, so the change in the resistance value is suppressed.
申请公布号 US8723294(B2) 申请公布日期 2014.05.13
申请号 US201113274535 申请日期 2011.10.17
申请人 YAMAMURA KEN;ASAHI KASEI MICRODEVICES CORPORATION 发明人 YAMAMURA KEN
分类号 H01L21/02 主分类号 H01L21/02
代理机构 代理人
主权项
地址
您可能感兴趣的专利