发明名称 |
Checksum verification accelerator |
摘要 |
Disclosed is a method for validating a data packet by a network processor supporting a first-network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet; identifies a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The method produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The method validates the data packet by comparing the data packet checksum to the second checksum. |
申请公布号 |
US8726134(B2) |
申请公布日期 |
2014.05.13 |
申请号 |
US201213466940 |
申请日期 |
2012.05.08 |
申请人 |
ABEL FRANCOIS;BASSO CLAUDE;CALVIGNAC JEAN L.;VAIDHYANATHAN NATARAJAN;VERPLANKEN FABRICE JEAN;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ABEL FRANCOIS;BASSO CLAUDE;CALVIGNAC JEAN L.;VAIDHYANATHAN NATARAJAN;VERPLANKEN FABRICE JEAN |
分类号 |
H03M13/00 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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