发明名称 Process for through silicon via filling
摘要 A semiconductor electroplating process deposits copper into the through silicon via hole to completely fill the through silicon via in a substantially void free is disclosed. The through silicon via may be more than about 3 micrometers in diameter and more that about 20 micrometers deep. High copper concentration and low acidity electroplating solution is used for deposition copper into the through silicon vias.
申请公布号 US8722539(B2) 申请公布日期 2014.05.13
申请号 US201113270897 申请日期 2011.10.11
申请人 REID JONATHAN D.;WANG KATIE QUN;WILLEY MARK J.;NOVELLUS SYSTEMS, INC. 发明人 REID JONATHAN D.;WANG KATIE QUN;WILLEY MARK J.
分类号 H01L21/44 主分类号 H01L21/44
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