发明名称 System and apparatus for wafer level integration of components
摘要 In a semiconductor package, a substrate has an active surface containing a plurality of active circuits. An adhesive layer is formed over the active surface of the substrate, and a known good unit (KGU) is mounted to the adhesive layer. An interconnect structure electrically connects the KGU and active circuits on the substrate. The interconnect structure includes a wire bond between a contact pad on the substrate and a contact pad on the KGU, a redistribution layer on a back surface of the substrate, opposite the active surface, a through hole via (THV) through the substrate that electrically connects the redistribution layer and wire bond, and solder bumps formed in electrical contact with the redistribution layer. The KGU includes a KGU substrate for supporting the KGU, a semiconductor die disposed over the KGU substrate, and an encapsulant formed over the semiconductor die.
申请公布号 US8722457(B2) 申请公布日期 2014.05.13
申请号 US20070965383 申请日期 2007.12.27
申请人 CAMACHO ZIGMUND R.;MERILO DIOSCORO A.;TAY LIONEL CHIEN HUI;BATHAN HENRY DESCALZO;STATS CHIPPAC, LTD. 发明人 CAMACHO ZIGMUND R.;MERILO DIOSCORO A.;TAY LIONEL CHIEN HUI;BATHAN HENRY DESCALZO
分类号 H01L21/00 主分类号 H01L21/00
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