发明名称 Method and apparatus for fabricating integrated circuit device using self-organizing function
摘要 In a method of fabricating an integrated circuit device having a three-dimensional stacked structured, the step of fixing many chip-shaped semiconductor circuits to a support substrate or a circuit layer with a predetermined layout can be performed easily and efficiently with a desired accuracy. Temporary adhesion portions 12b of semiconductor chips 13 are temporarily adhered to corresponding temporary adhesion regions 72a of a carrier substrate 73a by way of sticky material. The carrier substrate 73a is then pressed toward a support substrate or a desired circuit layer, thereby contacting connecting portions 12 of the chips 13 on the carrier substrate 73a with corresponding predetermined positions on the support substrate or a circuit layer. Thereafter, by fixing the connecting portions 12 to the predetermined positions, the chips 13 are attached to the support substrate or the circuit layer with a desired layout.
申请公布号 US8722460(B2) 申请公布日期 2014.05.13
申请号 US201213589590 申请日期 2012.08.20
申请人 KOYANAGI MITSUMASA 发明人 KOYANAGI MITSUMASA
分类号 H01L21/00 主分类号 H01L21/00
代理机构 代理人
主权项
地址