发明名称 DISPLAY DEVICE AND MEMORY CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a display device capable of reducing power consumption and suppressing the voltage drop of an output level, and to provide a memory circuit to be used for the display device.SOLUTION: A display device includes: a plurality of display pixels arranged on a matrix; a plurality of scanning lines or auxiliary capacity lines extending along a line in which the plurality of display elements are arrayed; a plurality of signal lines extending along a row in which the plurality of display pixels are arrayed; a drive circuit for driving the scanning lines or the auxiliary capacity lines; and a plurality of memory circuits for storing a drive signal in a binary level from the drive circuit in a predetermined period, and for outputting it. The memory circuit is configured as a memory circuit using a plurality of transistors, and provided with a function for storing the drive signal to be input and for preventing the stored signal voltage from dropping due to the off-leak of the transistor, and a function for completely putting the transistor into an ON-state.
申请公布号 JP2014085647(A) 申请公布日期 2014.05.12
申请号 JP20120237183 申请日期 2012.10.26
申请人 JAPAN DISPLAY INC 发明人 MORITA TETSUO;KIMURA HIROYUKI
分类号 G09G3/36;G02F1/133;G02F1/1343;G09G3/20 主分类号 G09G3/36
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