发明名称 REGISTER MAPPING TECHNIQUES FOR EFFICIENT DYNAMIC BINARY TRANSLATION
摘要 FIELD: radio engineering, communication.SUBSTANCE: present invention relates to dynamic binary translation. Generally, the present disclosure provides a system and method for mapping registers from a system with more registers to a system with fewer registers. Regions may be formed that include one or more blocks of code with relatively frequent register accesses. The most frequently accessed source registers may be mapped to target registers. Each block in the region may be bound by a prologue and at least one epilogue. The prologue may be configured to implement register mapping and the epilogue(s) may be configured to manage program flow from a block in the region to another block in that region or to a block not in that region.EFFECT: efficient technique for performing dynamic binary translation from an instruction-set architecture ("ISA") with more registers to an ISA with fewer registers.22 cl, 8 dwg, 1 tbl
申请公布号 RU2515217(C2) 申请公布日期 2014.05.10
申请号 RU20110153335 申请日期 2011.06.14
申请人 INTEL KORPOREJSHN 发明人 OTTONI GILERME D.;VAN KHON;LI VEJ
分类号 G06F9/45 主分类号 G06F9/45
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