METHOD OF MAKING A LOGIC TRANSISTOR AND A NON-VOLATILE MEMORY(NVM) CELL

摘要

An oxide-containing layer (18) is formed directly on a semiconductor layer (12) in a non-volatile memory (NVM) region (14), and a first partial layer (20) is formed over the oxide-containing layer in the NVM region. A first high permittivity dielectric layer (22) is formed directly on the semiconductor layer in a logic region (16). A first conductive layer (24) is formed over the first dielectric layer in the logic region. A second partial layer (26) of the first material is formed directly on the first partial layer in the NVM region and over the first conductive layer in the logic region. A logic device is formed in the logic region. An NVM cell is formed in the NVM region, wherein the first and second partial layer together are used to form one of a charge storage layer (28) if the cell is a floating gate cell or a select gate (28) if the cell is a split gate cell.