发明名称 |
POWER MANAGEMENT SRAM GLOBAL BIT LINE PRECHARGE CIRCUIT |
摘要 |
A domino static random access memory (SRAM) having one or more SRAM memory cells connected with a local bit line is disclosed. The SRAM may include a precharge device connected between a voltage supply and the local bit line, and global bit line (GBL) discharge logic connected between a local bit line and a GBL. The GBL discharge logic transfers a logic value of the local bit line to the GBL during a read operation. GBL precharge logic connects the GBL to a global precharge input. The GBL precharge logic is adapted to draw the GBL to a precharge voltage above a discharge voltage and below a supply voltage during a precharge operation. |
申请公布号 |
US2014126276(A1) |
申请公布日期 |
2014.05.08 |
申请号 |
US201313779111 |
申请日期 |
2013.02.27 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BEHRENDS DERICK G.;CHRISTENSEN TODD A.;HEBIG TRAVIS R.;LAUNSBACH MICHAEL |
分类号 |
G11C7/12 |
主分类号 |
G11C7/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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