发明名称 |
INTEGRATED CIRCUIT CHIPS HAVING VERTICALLY EXTENDED THROUGH-SUBSTRATE VIAS THEREIN |
摘要 |
Methods of forming an integrated circuit device include forming an interlayer dielectric layer on a first surface of a semiconductor substrate and then forming an interconnect hole that extends through the interlayer dielectric layer and into the semiconductor substrate. A first sidewall spacer layer is formed on a sidewall of the interconnect hole. The semiconductor substrate at a bottom of the interconnect hole is isotropically etched to define an undercut recess in the semiconductor substrate. This etching step is performed using the first sidewall spacer layer as an etching mask. The interconnect hole and the uncut recess are then filled with a through-via electrode. A second surface of the semiconductor substrate is removed for a sufficient duration to expose the uncut recess containing the through-via electrode. |
申请公布号 |
US2014124901(A1) |
申请公布日期 |
2014.05.08 |
申请号 |
US201414153478 |
申请日期 |
2014.01.13 |
申请人 |
LEE HO-JIN;LEE KANG-WOOK;PARK MYEONG-SOON;CHOI JU-II;HWANG SON-KWAN |
发明人 |
LEE HO-JIN;LEE KANG-WOOK;PARK MYEONG-SOON;CHOI JU-II;HWANG SON-KWAN |
分类号 |
H01L23/528;H01L23/522 |
主分类号 |
H01L23/528 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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