发明名称 GALOIS FIELD MULTIPLICATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a Galois field multiplication circuit that can be implemented in a regular circuit configuration.SOLUTION: In the Galois field multiplication circuit for multiplying two elements vector-represented by m bits on a Galois field GF(2) (hereafter m is an integer), an element operation section 10 for operation of an element of a product of the multiplication has m AND operation sections 11 for performing concurrent AND operations on bits of one of the two elements and bits of the other of the two elements or combinations of the bits, and an addition section 12 for performing an exclusive OR operation on operation results of the m AND operation sections.
申请公布号 JP2014082575(A) 申请公布日期 2014.05.08
申请号 JP20120227835 申请日期 2012.10.15
申请人 SAMSUNG R&D INSTITUTE JAPAN CO LTD 发明人 FUJIWARA DAISUKE
分类号 H03M13/01 主分类号 H03M13/01
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