发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device capable of improving a trade-off relation between autodoping and alignment mark shape collapse, and that has a high productivity.SOLUTION: First to sixth epitaxial layers 2-1 to 2-6 are sequentially grown on an Si {100} principal plane of an arsenic-doped substrate 1 by a multistage epitaxial system. An epitaxial growth condition for the first to sixth epitaxial layers 2-1 to 2-6 is that an epitaxial growth temperature is 1150-1180°C and an epitaxial growth speed is 2.2-2.6 μm/min, under a normal pressure atmosphere. To the arsenic-doped substrate 1, a concave alignment mark whose bottom face is an Si {100} plane is formed. For each time when the first to sixth epitaxial layers 2-1 to 2-6 are grown on the principal surface of the arsenic-doped substrate 1, concave alignment marks 3-1 to 3-6 formed by deformation of an upper part of the alignment mark of the lower layer are formed to the epitaxial layer of the uppermost surface layer.
申请公布号 JP2014082242(A) 申请公布日期 2014.05.08
申请号 JP20120227526 申请日期 2012.10.12
申请人 FUJI ELECTRIC CO LTD 发明人 YAMAGUCHI KAZUYA
分类号 H01L29/78;H01L21/02;H01L21/20;H01L21/336;H01L29/12 主分类号 H01L29/78
代理机构 代理人
主权项
地址