| 摘要 |
956, 896. Detection of signals of maximum amplitude or duration. STANDARD TELEPHONE & CABLES Ltd. Jan. 19, 1962 [Jan. 20, 1961],No. 2033/62. Heading G1U. [Also in Division G4] A circuit for detecting a signal of maximum value in a plurality of sequential signals comprising a signal receiver arranged to store the first signal of a sequence, and of the subsequent signals only a signal of greater value to replace a previously stored signal, a sensing circuit activated each time a signal is stored in the signal receiver, and a storage means controlled by the sensing circuit to record information identifying the position in the sequence of a signal of maximum value. In Fig. 1, plural signals are applied over channels 1 to n to normally open gates 11 which are closed in succession by counter 12 whereby the signals are connected in succession to signal receiver 13 which stores the first signal and releases the evaluating circuit 14, which operates storage device 15 to record the number of the channel. On arrival of a signal exceeding in magnitude the previously stored signal the latter is cancelled and replaced by the greater signal, and the number of the relevant channel is again recorded in device 15, so that after connection of all input channels to the signal receiver, the number of the channel in which the largest signal is received is recorded in device 15. When the signals arrive successively over a single line, gates 11 are omitted and counter 12 is operated from the signal input or a train of clock pulses (Fig. 2 not shown). The signal receiver 13, responsive to undirectional signals, comprises (Fig. 3) a storage capacitor C fed through diode D and the primary of transformer ³, which on charging in response to the first signal develops a secondary pulse triggering the evaluating circuit 14, comprising amplifier, threshold device, and monostable trigger circuit, into its unstable position, which impulses the counter to recored the channel number in storage device 15. Application of signals of lesser amplitude through successive gates leaves diode D, blocked but a greater signal again charges capacitor C over the diode and transformer U and again pulses the evaluating circuit to record the new channel and erase the former one, so that on completion of a cycle the store 15 indicates the channel having the greatest input signal. Prior to commencement of a new cycle, the capacitor is discharged by closure of switch S. Alternating input signals may be rectified prior to gating or storage. A resistance capicitance integrator may precede the circuit of Fig. 3 (Fig. 4 not shown) and the apparatus then responds to indicate the signal having greatest pulse duration. |
