| 摘要 |
An auxiliary memory circuit (12) is configured of a shift register wherein a plurality of flip-flops are cascade-connected and a plurality of inversion circuits that invert and output outputs (Q0) to (Qn) of each D flip-flop. A main memory circuit (13) is configured of a switch (SWa), which acts in accordance with a signal from the auxiliary memory circuit (12), and an EPROM connected in series to the switch (SWa) and driven by a writing voltage (1). A variable resistance circuit (19) is configured of a switch (SWb), which acts in accordance with a signal from the auxiliary memory circuit (12), and a resistor (Ra) connected in series to the switch (SWb). Because of this, it is possible for terminals of the writing voltage (1) and a writing voltage (2) to be commonized. Also, it is possible to provide a low-cost semiconductor integrated circuit and semiconductor physical quantity sensor device such that it is possible to carry out electrical trimming with the voltage when writing into the EPROM kept constant. |
