| 摘要 |
937,804. Control of D.C. motors. GENERAL ELECTRIC CO. Ltd. May 9, 1962 [May 18, 1961], No. 17751/62. Class 38 (3). [Also in Groups XXXV and XL (c)] The speed of a D.C. shunt motor, supplied from the unsmoothed output of bridge rectifiers 127, is kept constant by arranging for a speed error signal to control the instant of triggering a silicon controlled rectifier 131 in the circuit of armature 120. The motor field 121 is also supplied from the rectifiers 127, and at the end of each half wave the inductance of the field and the arrangement of rectifiers 128 and 132 causes reverse polarity to be applied to controlled rectifier 131 so rendering it non-conducting. As shown, the error signal is developed across a winding M1-3 of a magnetic amplifier by a bridge circuit comprising reference voltage source 139, 141, resistors 142, 143, and a voltage corresponding to armature back E.M.F. derived by subtracting the voltage across series resistor 135 (proportional to armature IR drop) from a portion of armature terminal voltage taken from potential divider 136, 137. The winding M1-3 is linked with windings M1-1 and M1-2 in series with the primary T1-1 of a saturable transformer, the arrangement being that the magnetic amplifier core will saturate, and so cause a current pulse through T1-1, during every half-cycle of A.C. supply 122 at a point on the cycle determined by the magnitude and direction of the error signal. The transformer has two, oppositely wound, secondaries T1-2, T1-3 so that the triggering pulse to rectifier 131 is positive for every half-cycle. In an alternative arrangement (Fig. 2, not shown) triggering is exacted by a known type of pulse generator which includes a transistor in series with a saturable transformer, the transistor being rendered conducting at the appropriate instant by the error signal. In this case the voltage drop across a resistor in series with the motor field is used as a reference. The circuit includes means for resetting the saturable transformer by passing a reverse current through it during the transistor " off " periods.
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