发明名称
摘要 The memory device electrically connectable to a host circuit includes a nonvolatile data memory section, a data reception section, a determination section, and a data transmission section. The data reception section receives, from the host circuit, data including first data to be written into a memory array, and second data generated from the first data. The determination section determines the consistency the first data and the second data. The data transmission section transmits the result of the determination to the host circuit.
申请公布号 JP5482275(B2) 申请公布日期 2014.05.07
申请号 JP20100030856 申请日期 2010.02.16
申请人 发明人
分类号 G06F12/16 主分类号 G06F12/16
代理机构 代理人
主权项
地址