发明名称 Programmable high-speed I/O interface
摘要 Methods and apparatus for providing either high-speed, or lower-speed, flexible inputs and outputs. An input and output structure having a high-speed input, a high-speed output, a low or moderate speed input, and an low or moderate speed output is provided. One of the input and output circuits are selected and the others are deselected. The high-speed input and output circuits are comparatively simple, in one example having only a clear signal for a control line input, and are able to interface to lower speed circuitry inside the core of an integrated circuit. The low or moderate speed input and output circuits are more flexible, for example, having preset, enable, and clear as control line inputs, and are able to support JTAG boundary testing. These parallel high and lower speed circuits are user selectable such that the input output structure is optimized between speed and functionality depending on the requirements of the application. <IMAGE>
申请公布号 EP2226941(A3) 申请公布日期 2014.05.07
申请号 EP20090013169 申请日期 2002.08.28
申请人 ALTERA CORPORATION 发明人 WANG, BOONIE I.;SUNG, CHIAKANG;HUANG, JOSEPH;NGUYEN, KHAI;PAN, PHILIP
分类号 G06F3/00;H03K19/177;G06F13/38;H03K19/0175;H03K19/0185;H03K19/173 主分类号 G06F3/00
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