发明名称 MANAGEMENT OF CHIP MULTIPROCESSOR COOPERATIVE CACHING BASED ON EVICTION RATE
摘要 Techniques described herein generally include methods and systems related to cooperatively caching data in a chip multiprocessor. Cooperatively caching of data in the chip multiprocessor is managed based on an eviction rate of data blocks from private caches associated with each individual processor core in the chip multiprocessor. The eviction rate of data blocks from each private cache in the cooperative caching system is monitored and used to determine an aggregate eviction rate for all private caches. When the aggregate eviction rate exceeds a predetermined value, for example the threshold beyond which network flooding can occur, the cooperative caching system for the chip multiprocessor is disabled, thereby avoiding network flooding of the chip multiprocessor.
申请公布号 WO2014018025(A3) 申请公布日期 2014.05.01
申请号 WO2012US48026 申请日期 2012.07.25
申请人 EMPIRE TECHNOLOGY DEVELOPMENT LLC;KRUGLICK, EZEKIEL 发明人 KRUGLICK, EZEKIEL
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项
地址