| 摘要 |
<p>PROBLEM TO BE SOLVED: To contribute to the writability of data in a memory cell regardless of an increase in the number of parallels of Y switches.SOLUTION: A semiconductor storage device includes a memory cell placed at an intersection part between a bit line and a word line, a memory mat including the memory cell, a sense amplifier for connecting a Y switch and the memory cell in the memory mat, a test signal control circuit for receiving a test control signal, and outputting a Y address test signal, a first decode circuit for receiving the Y address signal and the Y address test signal, and outputting a predecode signal, a second decode circuit for receiving the predecode signal, and outputting a Y switch selection signal for selecting one, two or more Y switches in parallel, and a sense amplifier control circuit for controlling active states of one, two or more sense amplifiers in parallel.</p> |
