发明名称 MEMORY MODULE AND LAYOUT METHOD FOR THE SAME
摘要 <p>PROBLEM TO BE SOLVED: To provide a new wiring method of an LR-DIMM of a VLP type of an LR-DIMM system.SOLUTION: A plurality of DRAMs, two connectors for input of data, and a buffer device for re-driving the data input to the two connectors and for supplying the data to the plurality of DRAMs are mounted on a substrate. The buffer device is disposed in a neighborhood of a center of the substrate where the two connectors are arranged on both sides thereof, and the data from each connector are supplied to the DRAM disposed at an opposite side.</p>
申请公布号 JP2014078281(A) 申请公布日期 2014.05.01
申请号 JP20140019306 申请日期 2014.02.04
申请人 PS4 LUXCO S A R L 发明人 HARASHIMA SHIRO;TSUKADA WATARU
分类号 G06F12/00;G06F13/16 主分类号 G06F12/00
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