发明名称 PACKAGE SUBSTRATE AND METHOD OF FORMING THE SAME
摘要 A package substrate and a method for forming the package substrate are disclosed. The package substrate includes an interposer having a plurality of conductive through vias and a first insulating layer formed on the sidewalls of the conductive through vias, a second insulating layer formed on one side of the interposer, and a plurality of conductive vias formed in the second insulating layer and electrically connected to the conductive through vias. By increasing the thickness of the first insulating layer, the face diameter of the conductive through vias can be reduced, and the layout density of the conductive through vias in the interposer can thus be increased.
申请公布号 US2014117557(A1) 申请公布日期 2014.05.01
申请号 US201313966045 申请日期 2013.08.13
申请人 UNIMICRON TECHNOLOGY CORPORATION;INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 CHEN YU-HUA;LO WEI-CHUNG;HU DYI-CHUNG;HSIEH CHANG-HONG
分类号 H01L23/48;H01L21/56 主分类号 H01L23/48
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