| 摘要 |
<p>Provided is a reconfigurable semiconductor device that includes a plurality of logic parts that are connected with one another via address lines or data lines, wherein each of the logic parts includes: a plurality of address lines; a plurality of data lines; a first address decoder that decodes addresses that are input from a part of the address lines; a second address decoder that decodes addresses that are input from a part of the address lines; a first memory cell unit that has a plurality of memory cells identified by the decode lines of the first address decoder; and a second memory cell unit that has a plurality of memory cells identified by the decode lines of the second address decoder.</p> |
