POLISHING PADS FOR CHEMICAL MECHANICAL PLANARIZATION

摘要

PROBLEM TO BE SOLVED: To provide polishing pads in which: (1) dishing of conductive features such as conductors and plugs is minimal; (2) die-level planarity is achieved across a wafer surface; and/or (3) defects such as scratches and light point defects are minimal and do not adversely affect electrical performance of a semiconductor device.SOLUTION: Provided is a polishing pad and a polishing process for polishing a surface of a semiconductor device or a precursor thereto, and for planarizing metal damascene structures on a semiconductor wafer. A polishing layer of the pad has: a hardness of about 40-70 Shore D; a tensile modulus of about 100-2,000 MPa at 40°C; and an E' ratio of about 1-5 at 30°C-90°C . Each linear dimension of said pad changes by less than about 1% and the hardness of said pad decreases by less than about 30% when said pad is immersed in deionized water for 24 hours at an ambient temperature of about 25°C.