| 摘要 |
A FIRST P CHANNEL TRANSISTOR (401) AND A FIRST N CHANNEL TRANSISTOR (407) ARE DEFINED BY FIRST AND SECOND GATE ELECTRODES, RESPECTIVELY. THE SECOND GATE ELECTRODE IS ELECTRICALLY CONNECTED TO THE FIRST GATE ELECTRODE. A SECOND P CHANNEL TRANSISTOR (403) AND A SECOND N CHANNEL TRANSISTOR (405) ARE DEFINED BY THIRD AND FOURTH GATE ELECTRODES, RESPECTIVELY. THE FOURTH GATE ELECTRODE IS ELECTRICALLY CONNECTED TO THE THIRD GATE ELECTRODE. EACH OF THE FIRST P CHANNEL TRANSISTOR, FIRST N CHANNEL TRANSISTOR, SECOND P CHANNEL TRANSISTOR, AND SECOND N CHANNEL TRANSISTOR HAS A RESPECTIVE DIFFUSION TERMINAL ELECTRICALLY CONNECTED TO A COMMON NODE (495). EACH OF THE FIRST, SECOND, THIRD, AND FOURTH GATE ELECTRODES (401A, 407A, 403A, 405A) IS DEFINED TO EXTEND ALONG ANY OF A NUMBER OF PARALLEL ORIENTED GATE ELECTRODE TRACKS WITHOUT PHYSICALLY CONTACTING A GATE LEVEL FEATURE DEFINED WITHIN ANY GATE LEVEL FEATURE LAYOUT CHANNEL ASSOCIATED WITH A GATE ELECTRODE TRACK ADJACENT THERETO. |
