发明名称 |
Method of making a logic transistor and a non-volatile memory (nvm) cell |
摘要 |
An oxide-containing layer (18) is formed directly on a semiconductor layer (12) in an NVM region (14), and a first partial layer (20) of a first material is formed over the oxide-containing layer in the NVM region. A first high-K dielectric layer (22) is formed directly on the semiconductor layer in a logic region (16). A first conductive layer (24) is formed over the first dielectric layer in the logic region. A second partial layer (26) of the first material is formed directly on the first partial layer in the NVM region and over the first conductive layer in the logic region. A logic device is formed in the logic region. An NVM cell is formed in the NVM region, wherein the first and second partial layer together are used to form one of a charge storage layer (28) if the cell is a floating gate cell or a select gate (28) if the cell is a split gate cell. |
申请公布号 |
EP2725607(A2) |
申请公布日期 |
2014.04.30 |
申请号 |
EP20130188538 |
申请日期 |
2013.10.14 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
SHROFF, MEHUL;HALL, MARK D |
分类号 |
H01L21/8239;H01L27/105 |
主分类号 |
H01L21/8239 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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