| 摘要 |
An information processing apparatus includes: at least one access unit (3) that issues a memory access request for a memory (10) ; an arbitration unit (4) that arbitrates the memory access request issued from the access unit (3); a management unit (8) that allows the access unit (3) that is an issuance source of the memory access request according to a result of the arbitration made by the arbitration unit (4) to perform a memory access to the memory (10) ; a processor (2) that accesses the memory (10) through at least one cache memory (22); and a timing adjusting unit (5) that holds a process relating to the memory access request issued by the access unit (3) for a holding time set in advance and cancels the holding of the process relating to the memory access request in a case where power of the at least one cache memory (22) is turned off in the processor (2) before the holding time expires. |
