发明名称 Platform agnostic power management
摘要 In an embodiment, a processor includes at least one functional block and a central power controller. The at least one functional block may include at least one block component and block power logic. The block power logic may be to: receive a first request to initiate a first reduced power mode in the at least one functional block, and in response to the first request, send a notification signal to a central power controller. The central power controller may be to, in response to the notification signal: store a first state of the at least one functional block, and initiate the first reduced power mode in the at least one functional block. Other embodiments are described and claimed.
申请公布号 GB201404478(D0) 申请公布日期 2014.04.30
申请号 GB20140004478 申请日期 2014.03.13
申请人 INTEL CORPORATION;VAZ, IRWIN J;KNOLLA, WILLIAM;GEORGE, VARGHESE;MORAN, DOUGLAS R;BIBIKAR, VASUDEV;SINGH, HARTEJ;KLINGLESMITH, MICHAEL T 发明人
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