发明名称 Synchronized command throttling for multi-channel duty-cycle based memory power management
摘要 <p>A technique for memory command throttling in a partitioned memory subsystem includes accepting, by a master memory controller included in multiple memory controllers, a synchronization command. The synchronization command includes command data that includes an associated synchronization indication (e.g., a synchronization bit or bits) for each of the multiple memory controllers and each of the multiple memory controllers controls a respective partition of the partitioned memory subsystem. In response to receiving the synchronization command, the master memory controller forwards the synchronization command to the multiple memory controllers. In response to receiving the forwarded synchronization command each of the multiple memory controllers de-asserts an associated status bit. In response to receiving the forwarded synchronization command, each of the multiple memory controllers determines whether the associated synchronization indication is asserted. Each of the multiple memory controllers with the asserted associated synchronization indication then transmits the forwarded synchronization command to associated power control logic.</p>
申请公布号 GB2498426(B) 申请公布日期 2014.04.30
申请号 GB20120021061 申请日期 2012.11.23
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 JOHN STEVEN DODSON;ERIC EUGENE RETTER;KARTHICK RAJAMANI;KENNETH WRIGHT
分类号 G06F13/16;G06F1/32 主分类号 G06F13/16
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