发明名称 Combination for composite layered chip package
摘要 A main package includes a plurality of stacked semiconductor chips and a plurality of first terminals associated with different ones of the semiconductor chips. An additional package includes an additional semiconductor chip and at least one second terminal electrically connected to the additional semiconductor chip. The additional semiconductor chip is to substitute for one of the plurality of semiconductor chips in the main package. The main package and the additional package are arranged in one of a plurality of relative positional relationships that is selected according to which one of the plurality of semiconductor chips in the main package is to be substituted with the additional semiconductor chip.
申请公布号 US8710641(B2) 申请公布日期 2014.04.29
申请号 US201213422723 申请日期 2012.03.16
申请人 SASAKI YOSHITAKA;ITO HIROYUKI;IIJIMA ATSUSHI;HEADWAY TECHNOLOGIES, INC.;SAE MAGNETICS (H. K.) LTD. 发明人 SASAKI YOSHITAKA;ITO HIROYUKI;IIJIMA ATSUSHI
分类号 H01L23/02;H01L29/40 主分类号 H01L23/02
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