Dual-box location aware and dual-bitmap voltage domain aware on-chip variation techniques

摘要

A dual-box location-based on-chip variation (DBLOCV) can be used in STA to significantly reduce pessimism. The DBLOCV analysis includes forming a backward bounding box and a forward bounding box for a cell of the design. A first intermediate maximum distance from the cell to corners of the backward bounding box can be calculated using the coordinates. A second intermediate maximum distance from the cell to corners of the forward bounding box can be calculated using the coordinates. A derate value can be determined from the derate table using the maximum distance of the first and second intermediate maximum distances. STA can be performed using the derate value. At least one timing report can be generated based on the STA.