发明名称 Switched capacitor hold-up scheme for constant boost output voltage
摘要 A power architecture receives an input signal at an input node and converts the input signal into an intermediate signal with a power conversion stage. The power conversion stage supplies the intermediate signal to an output node of the power conversion stage where the intermediate signal is filtered with an operating capacitance coupled to the output node. A hold-up capacitance is charged, and when a loss of the input signal is detected, the hold-up capacitance is coupled to the input node.
申请公布号 US8710820(B2) 申请公布日期 2014.04.29
申请号 US20100751067 申请日期 2010.03.31
申请人 PARKER ERNEST CLYDE;CRANE ELECTRONICS, INC. 发明人 PARKER ERNEST CLYDE
分类号 H02M3/156 主分类号 H02M3/156
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