发明名称 Controller interface providing improved data reliability
摘要 In one implementation, a memory device includes non-volatile memory, a memory controller communicatively coupled to the non-volatile memory over a first bus, and a host interface through which the memory controller communicates with a host device over a second bus. The memory device can also include a signal conditioner of the host interface adapted to condition signals to adjust a signal level of signals received over the second bus based on signal level data received from the host device, wherein the signal level data relates to a voltage level of signals generated by the host device to encode data transmitted across the second bus.
申请公布号 US8713404(B2) 申请公布日期 2014.04.29
申请号 US201113175610 申请日期 2011.07.01
申请人 FAI ANTHONY;SEROFF NICHOLAS;WAKRAT NIR JACOB;APPLE INC. 发明人 FAI ANTHONY;SEROFF NICHOLAS;WAKRAT NIR JACOB
分类号 G11C29/00;G01R31/00;G01V3/00;G11C11/34;G11C16/04;H03M13/00;H04L1/18 主分类号 G11C29/00
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