| 摘要 |
A logic element AND-NOT comprises AND circuit using a multi-emitter transistor and a resistor, an amplification stage and a complex inverter using n-p-n and p-n-p supplementary transistors, a p-n-p transistor, whose emitter is connected to a power distribution bus, a collector – to a base of supplementary p-n-p transistor of the complex inverter and by means of a resistor to the base of multi-emitter transistor. The base of supplementary p-n-p transistor is connected to the middle point of resistor-type divider connected between the power distribution bus and collector of amplification stage transistor. The series connected supplementary resistor and three diodes are introduced to the device. |
