| 摘要 |
A parallel analog-to-digital converter comprises a resistive matrix, buses of a reference source, 2-1 comparators and coding logics. Moreover, resistors, non-inverting inputs of 2-1 comparators, first and second analogues switches, buses of an input source, bias voltage buses, a current generator, buffer unit synchronization, clock signal buses and coding logics synchronization, a buffer unit, an exclusive OR and analogue-to-digital converter buses are incorporated. |
