发明名称 PLANAR TRANSFORMERS HAVING REDUCED TERMINATION LOSSES
摘要 The present disclosure relates to planar transformers including a plurality of circuit layers that are configured to reduce termination losses on at least one of the plurality of circuit layers. The plurality of circuit layers are stacked together in a first direction and include at least first and second circuit layers. The first and second circuit layers each include an electrically conductive trace forming at least one winding having a first termination portion and a second termination portion that are separated by a gap. The gaps of the first and second circuit layers are offset relative to each other in a second direction different from the first direction. The plurality of circuit layers may further include a third circuit layer, which includes an electrically conductive trace having a grounded portion that is disposed adjacent to at least one of the gaps of the first and second circuit layers.
申请公布号 WO2014062357(A1) 申请公布日期 2014.04.24
申请号 WO2013US62019 申请日期 2013.09.26
申请人 COVIDIEN LP;JOHNSTON, MARK A. 发明人 JOHNSTON, MARK A.
分类号 H01F27/28 主分类号 H01F27/28
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