发明名称 HYBRID GATE LAST INTEGRATION SCHEME FOR MULTI-LAYER HIGH-k GATE STACKS
摘要 A method for manufacturing a dual workfunction semiconductor device using a hybrid gate last integration scheme is described. According to one embodiment, the method includes heat-treating a first high-k film at a first heat-treating temperature to diffuse a first chemical element from a first cap layer into the first high-k film in a device region to form a first modified high-k film. The method further includes a gate-last processing scheme to form recessed features defined by sidewall spacers in the device regions and depositing a second high-k film in the recessed features. Some embodiments include forming an oxygen scavenging layer on the first high-k film, where the heat-treating the first high-k film scavenges oxygen from an interface layer to eliminate or reduce the thickness of an interface layer.
申请公布号 US2014110791(A1) 申请公布日期 2014.04.24
申请号 US201213656537 申请日期 2012.10.19
申请人 TOKYO ELECTRON LIMITED 发明人 CLARK ROBERT D.
分类号 H01L21/283;H01L27/092 主分类号 H01L21/283
代理机构 代理人
主权项
地址