| 摘要 |
A pixel circuit comprising a plurality of pixel units, wherein each pixel unit comprises a data line (50), a charge gate line (40), a common electrode line (60), a cache module (10), a pixel circuit module (20), and a common gate line (30); the cache module (10) is connected to the charge gate line (40) that supplies a control signal for the cache module (10); an input of the cache module (10) is connected to the data line (50), at the time of supplying a enable control signal by the charge gate line (40), the cache module (10) receives and stores a display signal supplied by the data line (50); the pixel circuit module (20) is connected to the common gate line (30) that supplies a control signal for the pixel circuit module (20); an output of the cache module (10) is connected to an input of the pixel circuit module (20), at the time of supplying an enable control signal by the common gate line (30), the display signal stored in the cache module (10) is written into the pixel circuit module (20). |
