ARITHMETIC PROCESSING DEVICE AND CONTROL METHOD FOR ARITHMETIC PROCESSING DEVICE

摘要

A CPU (100) that is disclosed by the present application includes a direction controller (121), an I2C command controller (112), and an I2C command execution unit (122). The direction controller (121) decodes a control direction generation direction for generating a control direction that is contained in a program. The I2C command controller (112) generates a state information read direction when the control direction generation direction decoded by the direction controller (121) is a control direction generation direction for generating the state information read direction for reading state information from a failure flag latch (123). The I2C command execution unit (122) reads state information from the failure flag latch (123) based on the state information read direction generated by the I2C command controller (112) so as to store the state information in an I2C receive register (115) that is capable of being read from a program.