| 摘要 |
An encoder (10) encodes data (20, D1) to generate corresponding encoded data (70, E2). The encoder (10) includes an analysis unit (100) for analysing one or more portions (40) of the data (20, D1) to be encoded, and for directing the one or more portions (40) to appropriate one or more encoding units (110), wherein the one or more encoding units (110) are operable to encode the one or more portions (40) thereat to generate the encoded data (70, E2). The one or more encoding units (110) are operable to employ mutually different encoding algorithms when encoding the one or more portions (40). At least one encoding unit (110( i )) of the one or more encoding units (110) is operable to compute data values present in each portion (40) received thereat, to sub-divide the data values into at least two sets, to compute at least one aggregate value for a given set derived from the data values present in the given set. Whilst retaining a spatial mask (320) of the portion (40), the spatial mask (320) and information representative of the values computed for the at least two data sets is included in the encoded data (70, E2). A corresponding decoder (25) for decoding data (70) generated by the encoder (10) executes an inverse of encoding steps employed in the encoder (10). The encoder (10) and/or the decoder (25) are beneficially implemented using dedicated electronic hardware, for example a custom digital integrated circuit, a field-programmable gate array ( FPGA ) or similar. Alternatively, or additionally, the encoder (10) and/or the decoder (25) can be implemented by executing one or more software products, stored on non-transitory machine-readable data storage media, on computing hardware coupled in data communication with data memory. Optionally, the computing hardware is implemented as a high-speed reduced-instruction-set (RISC) processor. |
