发明名称 |
Semiconductor device and a display device |
摘要 |
A standard cell used for the logic synthesis and the routing of layout is configured by a logic circuit on an output side and a logic circuit on an input side, and a driving capacity of the logic circuit on the output side is made large while gate input capacitance of the logic circuit on the input side is made small. |
申请公布号 |
US8704551(B2) |
申请公布日期 |
2014.04.22 |
申请号 |
US201213429595 |
申请日期 |
2012.03.26 |
申请人 |
KUROKAWA YOSHIYUKI;SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
KUROKAWA YOSHIYUKI |
分类号 |
H01L51/50;H03K19/00;G01R31/28;G02F1/133;G06F17/50;G09G3/36;H01L21/77;H01L21/82;H01L21/84;H01L27/02;H01L27/12;H01L29/786;H05B33/14 |
主分类号 |
H01L51/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|