| 摘要 |
There is provided a decoder in which a matrix of transistors, a plurality of reference voltage signal lines arranged on a first interconnect layer and extended in a row direction, being separated to one another over the matrix, and a plurality of reference voltage signal lines arranged on a second interconnect layer and extended in the row direction, being separated to one another over the matrix. The reference voltage signal lines on the mutually different layers are respectively connected to impurity diffusion layers of the transistors that are adjacent in the row direction. The reference voltage signal lines on the mutually different layers are respectively connected to the impurity diffusion layers of the transistors that are adjacent in a column direction. |
